Publications

9999

• 9999, Carrabina, J., Velasco, A.J., and Lisa, F.. Implementación con FPGAs Sistemas Digitales. S{‘ıntese F{‘ısica de Circuitos Integrados..
• 9999, Portero, A., Cathoor, F., Carrabina, J., and Talavera, G.. Methodology for Multimedia Applications in Multiplatform Implementation for energy-flexibility space exploration. Planned for re-submission to the IEEE Transactions on Computers
• 9999, Talavera, G., Cathoor, F., Carrabina, J., Jayapala, M., Raghavan, P., and Portero, A.. Power exploration and address generation optimization of multimedia applications on VLIW processors. Planned for re-submission to the IEEE Transactions on Image Processing
• 9999, Portero, A., Cathoor, F., Carrabina, J., and Talavera, G.. Data-Dominant Application implementation in Multi-platform for energy-flexibility space Exploration. Planned for re-submission to the IEEE Transactions on Image Processing

2011

• 2011, Talavera, G., Cathoor, F., and Carrabina, J.. Energy-aware address generation optimization.
• 2011, Montón, M., Carrabina, J., and Burton, J.. High-level platform modeling and exploration.
• 2011, Joven, J., Carrabina, J., and Castells-Rufas, D. System-Level Software and Architectural Support for NoC-based MPSoCs.

2010

• 2010, Moreno-Berengue, M., Carrabina, J., Rodriguez-Alsina, A., and Talavera, G.. Address generation unit for multimedia applications on application specific instruction set processors. 6th Annual Conference of the IEEE Industrial Electronics Society. IECON-2010
• 2010, Montilla, V., Carrabina, J., and E. Ramon. Frequency Scan Technique for Inkjet-printed Chipless Sensor Tag Reading. IEEE 2010 International Conference on Electronics, Circuits, and Systems (ICECS 2010).
• 2010, Portero, A., Catthoor, F., and Carrabina, J.. HW/SW Implementation trade-offs of MPEG-4 Data-Flow Algorithm.
• 2010, Fernández-Alonso, E., Carrabina, J., Joven, J., Risueño, S., and Castells-Rufas, D. Hybridising NIC/NoC switching techniques. DCIS 2010
• 2010, J. Mujal, Terés, L., Mart{‘ınez, R., Calleja, Á., Carrabina, J., and E. Ramon. Inkjet Printed Antennas for NFC Systems. IEEE 2010 International Conference on Electronics, Circuits, and Systems (ICECS 2010)
• 2010, Castells-Rufas, D, Joven, J., Carrabina, J., Fernández-Alonso, E., and Risueño, S.. Instruction Set Extensions to Reduce Latency in Soft-Core Clusters. DCIS 2010
• 2010, Fernández-Alonso, E., Joven, J., Carrabina, J., Risueño, S., and Castells-Rufas, D. Minimization of Router Resource Usage for Small Area NoC Designs. IEEE 2010 International Conference on Electronics, Circuits, and Systems (ICECS 2010).
• 2010, Castells-Rufas, D, Mix, H., William, T., Carrabina, J., Fernández-Alonso, E., Risueño, S., and Joven, J.. MPSoC Performance Analysis with Virtual Prototyping Platforms.. PSTI 2010
• 2010, Fernández-Alonso, E., Carrabina, J., Joven, J., Castells-Rufas, D, and Risueño, S.. Multiprocesador de 16 núcleos soft-core con arquitectura NoC.. JCRA 2010
• 2010, Joven, J., Carrabina, J., Castells-Rufas, D, and Angiolini, F.. QoS-ocMPI: QoS-aware on-chip Message Passing Library for NoC-based Many-Core MPSoCs.. PMEA
• 2010, . Scalability of a Parallel JPEG Encoder on Shared Memory Architectures”. ICCP 2010
• 2010, Rodriguez-Alsina, A., Carrabina, J., Moreno-Berengue, M., Puig-Fargas, R., and Cespedes-Borras, E.. Unified Content Design for Ubiquitous Learning: The Soldering Seminar Use Case. 4th IEEE International Conference on E-Learning in Industrial Electronics (ICELIE-2010)
• 2010, A. Gonzalez Alvarez, Jordi Carrabina, J. Mujal, E. Ramon, L. López, and L. Francesch. Printed Electronics Aplicada al Desarrollo de Dispositivos Flexibles. XI Congreso Nacional de Materiales

2009

• 2009, Cespedes-Borras, E., Serrano, J., Carrabina, J., and Rodriguez-Alsina, A.. Adding Tags to Courses to Improve Evaluation – A Multiplatform LCMS Approach that Allows Multidimensional Analysis. International Conference on Computer Supported Education (CSEDU) 92-97
• 2009, Castells-Rufas, D. (eds.), Carrabina, J., Fernández-Alonso, E., Risueño, S., and Joven, J.. NocMaker: A cross-platform open-source design space exploration tool for networks on chip. INA-OCMC Workshop
• 2009, Rodriguez-Alsina, A., Carrabina, J., Cespedes-Borras, E., and Moreno-Berengue, M.. Platform-independent Web-Based iTV Services Through DVB-PCF Transcoding. IEEE IC-BNMT2009
• 2009, Casanovas, P., Serrano, J., Montero, C., Monton, M., Carrabina, J., Poblet, M., Blázquez, M., Gracia, C., Galera, N., Teodoro, E., Gracia, C., and Binefa, X.. The e-Sentencias Prototype: A Procedural Ontology for Legal Multimedia Applications in the Spanish Civil Courts. Law, Ontologies and the Semantic Web 2009 188 199-219

2008

• 2008, Talavera, G., Cathoor, F., Carrabina, J., and Jayapala, M.. Address Generation Optimization for Embedded High-Performance Processors: A Survey. Journal of Signal Processing Systems for Signal Image and Video Technology (formerly the Journal of VLSI Signal Processing Systems for Signal Image and Video Technology)
• 2008, Valderrama, E., Muñoz, J., Fernández, J.M., Mart{‘ınez, B., Montón, M., and Talavera, G.. Comparación de dos metodologias docentes utilizadas en los seminarios de Fundamentos de Computadores. XIV Jornadas de Ense
• 2008, Joven, J., Carrabina, J., Terés, Ll., Mart{‘ınez, R., Castells-Rufas, D, and Font-Bach, D.. xENoC – An eXperimental Network-on-Chip Environment for parallel distributed computing on NoC-based MPSoC architectures. 16th Euromicro Int. Conf. on Parallel, Distributed and network-based Processing (PDP’08)

2007

• 2007, Rujan, P., Carrabina, J., Castells-Rufas, D, Montón, M., Gomm, B., and Vuillod, F.. AMASS CORE: ASSOCIATIVE MEMORY ARRAY FOR SEMANTIC SEARCH. IP 07 Conference
• 2007, S. Rodriguez-Parera,, Carrabina, J., L. Van der Perre, and A. Bourdoux, F. Horlin. Front-End ADC Requirements for Uniform Bandpass Sampling in SDR.
• 2007, Rodriguez-Parera,S., Carrabina, J., Van der Perre, L., Horlin, F., and Bourdoux, F.. Front-End ADC Requirements for Uniform Bandpass Sampling in SDR. 65th IEEE Vehicular Technology Conference VTC
• 2007, Castells-Rufas, D and Carrabina, J.. Jumble: A Hardware-in-the-Loop Simulation System for JHDL. 15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2007. FCCM 2007. v
• 2007, Gracia, C.; Casanovas, P.;, et al, and Carrabina, J.. Legal Knowledge Acquisition and Multimedia Applications. KAMC’07 Workshop “Knowledge acquisition from multimedia content” Second International Conference on Semantic and Digital Media Technologies, SAMT 2007
• 2007, Gracia, C., Poblet, M., Serrano, J., Galera, J., Montoro, C., Casellas, N., Montón, M., Teodoro, E., Binefa, X., Carrabina, J., and Casanovas, P.. Legal Knowledge Acquisition and Multimedia Applications. Proc. 1st Int. Workshop “Knowledge acquisition from multimedia content” (KAMC’07) 2nd Int. Conf. on Semantic and Digital Media Technologies, SAMT 2007.
• 2007, Montón, M., Carrabina, J., Mart{‘ınez, B., Moreno, M., and Portero, A.. Mixed SW/SystemC SoC Emulation Framework. 2007 IEEE International Symposium on Industrial Electronics

2006

• 2006, Merino, J. L., Carrabina, J., and Terés, L.. A current copying structure for current-mode monotonic digital-to-analog converters. Proc. 2006 IEEE International Symposium on Circuits and Systems. ISCAS 2006.
• 2006, Castells-Rufas, D. (eds.), Carrabina, J., and Joven, J.. A validation and performance evaluation tool for protonoc. International Symposium on System-on-Chip 2006
• 2006, Castells-Rufas, D and Carrabina, J.. Camera-Based Digit Recognition System. 13th IEEE International Conference on Electronics, Circuits and Systems. ICECS 2006
• 2006, Alonso, A., Carrabina, J., E. Ramon, and Rubio, L.. Comparativa de desarrollo de la capa PHY de un transceiver ZigBee. VI Jornadas de Computación Reconfigurable y Aplicaciones. JCRA 2006
• 2006, Portero, A., Carrabina, J., Actor, F., and Talavera, G.. Dynamic Voltage Scaling for Power efficient MPEG4-SP Implementation. Proc. of IEEE 17th Int. Conference on Application-specific Systems, Architectures and Processors – ASAP 2006
• 2006, Portero, A., Carrabina, J., Cathoor, F., Moreno, M., Mart{‘ınez, B., Montón, M., Joven, J., and Talavera, G.. Energy-Aware MPEG-4 Single Profile In HW_SW Multi-Platform Implementation. IEEE International SoC Conference
• 2006, Joven, J., Carrabina, J., and Castells-Rufas, D. HW-SW framework for distributed parallel computing on programmable chips. XXI Conf. Design of Circuits and Integrated Systems.
• 2006, Joven, J., Carrabina, J., and Castells-Rufas, D. Metodolog{‘ıa de codiseño hardware-software para la computación paralela distribuida dentro de un chip. VI Jornadas de Computación Reconfigurable y Aplicaciones. JCRA 2006
• 2006, Portero, A., Carrabina, J., Mart{‘ınez, B., Montón, M., and Talavera, G.. NoC System for MPEG-4 SP using heterogeneous tiles. XXI Conf. Design of Circuits and Integrated Systems.
• 2006, Mart{‘ınez, B., Carrabina, J., and Montón, M.. S{‘ıntesis de Unidades Funcionales para Soft-Cores desde un modelo C/C++. VI Jornadas de Computación Reconfigurable y Aplicaciones. JCRA 2006
• 2006, Castells-Rufas, D, Carrabina, J., and Morugó, A.. Traducción automática de JHDL a VHDL. VI Jornadas de Computación Reconfigurable y Aplicaciones. JCRA 2006
• 2006, Alonso, A., Carrabina, J., E. Ramon, and Rubio, L.. Two Different ZigBee Transceiver Implementations in Two Different FPGAs. XXI Simpósium Nacional de la Unión Cient{\’ıfica Internacional de Radio URSI 2006

2005

• 2005, Ribas-Xirgo, L., Carrabina, J., Montón, M., and Castells-Rufas, D. A Rapid Sorting Unit based on Programmable Shifting Register Files. XX Conference on Design of Circuits and Integrated Systems. (DCIS)
• 2005, Pla, R., Carrabina, J., and Portero, A.. Diseño de una NoC en SystemC. V Jornadas de Computación Reconfigurable y Aplicaciones. JCRA 2005. Integrado en CEDI2005
• 2005, Massa, C., Pons, E., Mart{‘ınez, B., Carrabina, J., and E. Ramon. Embedded Wireless Web Server Camera. V Jornadas de Computación Reconfigurable y Aplicaciones. JCRA 2005. Integrado en CEDI2005.
• 2005, Carrabina, J., Velasco, A.J., Sánchez, F., and Peiron, M.. Fonaments Tecnològics I Fundació per a la Universitat Oberta de Catalunya..
• 2005, Carrabina, J., Velasco, A.J., Sánchez, F., and Peiron, M.. Fundamentos Tecnológicos I Fundació per a la Universitat Oberta de Catalunya..
• 2005, Portero, A., Carrabina, J., and Ribas, Ll.. Hardware Synthesis of Parallel Machines from SystemC. Forum on Specification & Design Languages. FDL2005
• 2005, Portero, A., Carrabina, J., Marbá, A., Ribas, Ll., Montón, M., and Pla, R.. Implementación de un Codificador de Video en una NoC (Red en un Chip)”. V Jornadas de Computación Reconfigurable y Aplicaciones. JCRA 2005. Integrado en CEDI2005.
• 2005, Castells-Rufas, D, Carrabina, J., and Pons, E.. Implementación de un sistema OCR en FPGA. V Jornadas de Computación Reconfigurable y Aplicaciones. JCRA 2005. Integrado en CEDI2005.
• 2005, Montón, M., Carrabina, J., Portero, A., and Castells-Rufas, D. Implementación SystemC sintetizable de un procesador asociativo para elalgoritmo de Dijkstra. V Jornadas de Computación Reconfigurable y Aplicaciones. JCRA 2005. Integrado en CEDI2005.
• 2005, Mart{‘ı, P., Carrabina, J., and Serra, M.. Low-cost printed antennas design in the band of 2,4GHz. International Symposium on Microtechnologies for the New Millenium 2005
• 2005, Portero, A., Carrabina, J., Rodriguez-Alsina, A., and Pla, R.. NoC Design of a Video Encoder in a Multiprocessor System on Chip Solution. The 17th International Conference on Microelectronics. ICM 2005
• 2005, Lambrechts, A., Carrabina, J., Corporaal, H., Deconinck, G., Verkest, D., Cathoor, F., Jayapala, M., Vander, T., Talavera G., Leroy, A., and Raghavan, P.. Power Breakdown Analysis for a Heterogeneous NoC Platform Running a Video Application. Proc. of IEEE 16th Int. Conference on Application-specific Systems, Architectures and Processors – ASAP 2005
• 2005, Veredas, F. J. and Carrabina, J.. Power Dissipation Impact of the Technology Mapping Synthesis on FieldProgrammable Gate Arrays. V Jornadas de Computación Reconfigurable y Aplicaciones. JCRA 2005. Integrado en CEDI2005
• 2005, Veredas, F. J. and Carrabina, J.. Power Dissipation Impact of the Technology Mapping Synthesis on Look-up Table Architectures. Proc. 15th International Workshop PATMOS 2005 Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation.
• 2005, Serra, M., Carrabina, J., and Mart{‘ı, P.. Rapid prototyping with the visual data environment of an OFDM WLAN System. International Symposium on Microtechnologies for the New Millenium 2005 Proc. SPIE. VLSI Circuits and Systems II.

2004

• 2004, Ribas, Ll., Carrabina, J., and Castells-Rufas, D. A Linear Sorter Core based on a Programmable Register File. Proc. of XIX Conference on Design of Circuits and Integrated Systems
• 2004, Portero, A., Carrabina, J., Catthoor F., Piñuel, L., Gomez J.I, and Marchal, P.. A Study of Trade offs in Inter-frame Compression MPEG for a Multiprocessor Platform. Proc. of XIX Conference on Design of Circuits and Integrated Systems
• 2004, Ordeix, J., Carrabina, J., Serra, M., and Mart{‘ı, P.. “Arquitectura de un Decodificador Convolucional a partir del Algoritmo de Viterbi. FPGAs: COMPUTACIÓN Y APLICACIONES
• 2004, Carrabina, J., Castells-Rufas, D. (eds.), Navas, O., and Ribas, L.. COMPUTACION RECONFIGURABLE: METODOLOGÍA, HERRAMIENTAS Y APLICACIONES.
• 2004, Lambrechts, A., Carrabina, J., Robert, F., Corporaal, H., Deconinck, G., Verkest, D., Catthoor, F., Mei, B., Barat, F., Shickova, A, Talavera, G., Leroy, A., Jayapala, M., and Vander Aa, T.. Design Style Case Study for Compute Nodes of a Heterogeneous NoC Platform. Proc. of IEEE International Real-Time Systems Symposium – RTSS04
• 2004, Montón, M., Carrabina, J., Terés, Ll., Ru{‘ız, R., Font, O., Joven, J., Mart{‘ınez, R., and Garc{‘ıa, P.. Diseño de Sistemas Electrónicos basado en Plataformas: FPGAs & ASICs (Tutorial). FPGAs: COMPUTACIÓN Y APLICACIONES
• 2004, Talavera, G., Carrabina, J., and Saiz, J.. Dispositivos y Plataformas para Docencia de Inform. FPGAs: COMPUTACIÓN Y APLICACIONES
• 2004, Castells-Rufas, D, Carrabina, J., and Farré, J.. Experimentación con el Lenguaje JHDL. FPGAs: COMPUTACIÓN Y APLICACIONES
• 2004, Navas, O., Bonamusa, M., Escrig, J., Carrabina, J., Novo, D., and Portero A.. Flexible HW/SW Implementation of MPEG Systems using FPGA Platforms. Proc. of XIX Conference on Design of Circuits and Integrated Systems
• 2004, Carrabina, J., Navas, O. (eds.), Castells-Rufas, D, and Ribas, L.. FPGAs: COMPUTACIÓN Y APLICACIONES.
• 2004, Talavera, G., Carrabina, J., Lauwereins, R., Vernalde, S., Verkest, D., Mignolet, J.Y., and Mollet, V. Hardware-Software Debugging Techniques for Reconfigurable Systems-on-Chip. Proc. of IEEE International Conference on Industrial Technology – ICIT04
• 2004, Portero, T., Carrabina, J., Navas, O., Pla, R., and Moyano, J.-V.. Implementación de Algoritmos MPEG usando SystemC. FPGAs: COMPUTACIÓN Y APLICACIONES
• 2004, Navas, O., Carrabina, J., Portero, A., Bonamusa, M., and Escrig, J.. Implementación HW/SW de Sistemas MPEG utilizando Plataformas con FPGAs (Tutorial). FPGAs: COMPUTACIÓN Y APLICACIONES
• 2004, Serra, M., Carrabina, J., and Mart{‘ı, P.. Implementation of a channel equalizer for OFDM wireless LANs. Proc. of 15th IEEE International Workshop on Rapid System Prototyping (RSP’04)
• 2004, Navas, O., Mart{‘ı, P., Serra, M., Carrabina, J., Novo, D., Bonamusa, M., and Escrig, J.. Metodolog{‘ıa de Prototipado Rápido desde Matlab: Herramientas Visuales para Flujo de Datos. FPGAs: COMPUTACIÓN Y APLICACIONES

2003

• 2003, Veredas, X., Pfleiderer. H-J., Carabina, J., Heer, C., and Scheppler, M.. Accelerator for an Associative Computing Engine.
• 2003, Alarcón, R. and Carabina, J.. Asynchronous Circuits Applied to Communications: A Modular Micropipeline Architecture for {QoS}-ATM Management. International Conference on Computer, Communication and Control Technologies (CCCT ’03). Orlando 31
• 2003, Ordeix, J., Carrabina, J., Mart{‘ı, P., and Parés, S.. “Descodificador convolucional a partir de l’algorisme de Viterbi”. I Jornades de Codisseny Hardware Sofware 26-27
• 2003, Serra, M., Carrabina, J., Mart{‘ı, P., and Novo, D.. Diseño del mòdulo IFFT para un dispositivo lògico programable (FPGA) según el estàndard Hiperlan/2. I Jornades de Codisseny Hardware Sofware.
• 2003, Serra, M., Carrabina, J., Mart{‘ı, P., and Novo, D.. “Equalitzador de canal per a modulacions OFDM segons l’est. I Jornades de Codisseny Hardware Sofware 26-27
• 2003, Carrabina, J., Serra, M., Puig-Fargas, R., Castells-Rufas, D, Mart{‘ınez, R., Portero, A., and Ribas, Ll.. Plataformes de Prototipatge Ràpid. I Jornades de Codisseny Hardware Software
• 2003, Mumbrú, E., Carrabina, J., Mart{‘ı, P., Novo, D., and Serra, M.. Sistema de Sincronització per l’estàndard Hiperlan/2. I Jornades de Codisseny Hardware Sofware. 26-27

2002

• 2002, Ribas, L., Carrabina, J., and Saiz, J.. A system benchmark specification experiment with Esterel/C. System on Chip Design Languages
• 2002, Calmon, F., Foussier, P., Carrabina, J., Gontrand, C., Viverge, P.J., and Fathallah, M.. A-13 FPGA and Mixed FPGA-DSP Implementations of Electrical Drive Algorithms Field-Programmable Logic and Applications.. Lecture Notes in Computer Science Springer-Verlag Heidelberg
• 2002, Carrabina, J., Mart{‘ı, P., Ordeix, J., Serra, M., Portero, A., Saiz, J., and Ribas, L.. Descripción de la Computación y su implementación Reconfigurables (Invitada). Actas de las 2as Jornadas sobre Computación Reconfigurable y Aplicaciones.
• 2002, Mart{‘ı, P., Carrabina, J., Ordeix, J., Serra, M., and Novo, D.. Diseño de un bloque FFT/IFFT con alto grado de paralelismo mediante FPGA. Actas de las 2as Jornadas sobre Computación Reconfigurable y Aplicaciones.
• 2002, Ordeix, J., Carrabina, J., Serra, M., Marti, P., and Font, M.. Diseño del decodificador convolucional a partir del algoritmo de Vitervi. Versiones Hard y Soft. Actas de las 2as Jornadas sobre Computación Reconfigurable y Aplicaciones.
• 2002, Ribas, Ll., Carrabina, J., and Saiz, J.. ECL specification of a simple processor.
• 2002, Portero, A., Carrabina, J., Vernalde, S., Vanmerbeek, G., and Pasko, R.. Flujo de Codiseño para la Implementación de Algoritmos de Compresión de Imágenes para Sistemas HW-SW Reconfigurables.
• 2002, Serra, M., Carrabina, J., Marti, P., Ordeix, J., and Rafael, X.. Prototipo demostrador de OFDM: Transmisor. Actas de las 2as Jornadas sobre Computación Reconfigurable y Aplicaciones.
• 2002, Carrabina, J. and Velasco, A.J.. Representació de la informació Colección: e-books.
• 2002, Velasco, A.J. and Carrabina, J.. Representación de la Información Colección: e-books.

2001

• 2001, Serra, M., Carrabina, J., Ribas, L., Saiz, Q., Portero, A., and Tirado, J.. Co-design for rapid prototyping of embedded systems based on reconfigurable platforms Design of hardware/software embedded systems..
• 2001, Carrabina, J., Velasco, A.J., Sánchez, F., Peiron, M., and De Miguel, P.. Fonaments de Computadors I.
• 2001, Carrabina, J., Velasco, A.J., Sánchez, F., Peiron, M., and De Miguel, P.. Fundamentos de Computadores I.

1999

• 1999, Errachid, A., Carrabina, J., Bausells, B., and Merlos, A.. Development of ISFET in a commercial CMOS technology.. Qu{\’ımica anal{\’ıtica 1999 18 62-64
• 1999, Bausells, B., Merlos, A., Errachid, A., and Carrabina, J.. Ion-Sensitive field-effect transistor fabricated in a commercial CMOS technology. Sensors and Actuators B 57 56-62

1998

• 1998, Ribas, L. and Carrabina, J.. Symsim: un simulador para el estudio de circuitos digitales a nivel de transistor.. Información Tecnológica Vol. 9 Nº3

1997

• 1997, Riera, J., Carrabina, J., Velasco, A.J., and Ribas, Ll.. Deriving Cost Functions from Cell Libraries and Real IC’s to real Area-Power-Delay Trade-off in Early Stages of Logic Synthesis.. Journal of Systems Architecture 43 119-122
• 1997, Bausells, B., Samitier, J., Bota, S., Merlos, A., and Carrabina, J.. Mechanical sensors integrated in a commercial CMOS technology.. Sensors and Actuators A, Vol.62/1-3 698-704