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Partner:<\/strong><\/span><\/p>\n IMSE-US (coordinator) <\/span> <\/strong><\/p>\n group link and logo<\/strong><\/p>\n IP 1 – Coordinador 1 : <\/strong>Francisco Vidal Fern\u00e1ndez Fern\u00e1ndez<\/p>\n IP 2 – Coordinador 2 : <\/strong>Rafael Castro L\u00f3pez<\/p>\n ___________________________________<\/p>\n REDEC – UAB <\/strong><\/span><\/p>\n group link and logo<\/strong><\/p>\n IP 1 : <\/strong>Rosana Rodr\u00edguez Mart\u00ednez<\/p>\n IP 2 : <\/strong>Montserrat Nafr\u00eda Maqueda<\/p>\n ___________________________________<\/p>\n HIPICS\/QINE- UPC\u200b<\/strong><\/span><\/p>\n group link and logo<\/strong><\/p>\n IP 1 : <\/strong>Jos\u00e9 Antonio Rubio Sola<\/p>\n IP 2 : <\/strong>Rosa Rodr\u00edguez Monta\u00f1\u00e9s<\/p>\n ___________________________________<\/p>\n Funding Agency:<\/strong><\/span><\/p>\n <\/p>\n Key words:<\/strong><\/span><\/p>\n Variability, IC design, reliability evaluation, compact modeling, characterization, security, mitigation, exploitation, CMOS, emerging devices<\/p>\n <\/p>\n Summary:<\/strong><\/span><\/p>\n Electronic devices flood many aspects of our lives. The wondrous evolution of nano-CMOS technologies with the emergence of new materials and devices is behind it. The demand for integrated circuits (ICs) is not without challenges though: our modern digital economy and society requires them to be more functional, more reliable, safer and more secure, and fields like IoT, Cybersecurity and High-performance computing are now priorities in many research agendas. However, one critical obstacle in this evolution is variability, culprit for the device parametric fluctuations deriving in a reliability loss of the IC. Rising right after fabrication (TZV, Time-Zero Variability) or during the IC lifetime (TDV, Time-Dependent Variability), it ends up critically compromising its functionality or even cutting short its lifetime. If variability is undealt with, ICs will no longer be able to fulfil the capabilities of safety, security, and reliability.<\/p>\n VIGILANT faces up this challenge from two perspectives. It will first develop solutions and new design paradigms to lessen or tolerate variability; the goal is clear: mitigate its negative impact. Second, realizing variability has also a beneficial side, TZV and TDV will be exploited for hardware-based security. While this duality mitigation\/exploitation is one key goal, there is another cross-cutting goal: the evaluation of several technologies and their potential for the duality, from the established bulk CMOS, through the versatile FDSOI, to beyond-CMOS alternatives like memristors. To undertake the goals, VIGILANT needs the complementary expertise of teams (IMSE, UAB and UPC) with a successful track record in the collaborative investigation of variability.<\/p>\n <\/p>\n Publications:<\/strong><\/span><\/p>\n Journals<\/b><\/u><\/span><\/p>\n Altet J, Barajas E, Mateo D, Billong A, Aragones X, Perpi\u00f1\u00e0 X, Reverter F. BPF-Based Thermal Sensor Circuit for On-Chip Testing of RF Circuits. Sensors. 2021; 21(3):805. https:\/\/doi.org\/10.3390\/s21030805 <\/a><\/b><\/p>\n<\/li>\n P Saraza-Canflanca, H Carrasco-Lopez, A Santana-Andreo, Piedad Brox, R Castro-Lopez, Elisenda Roca, Francisco V Fernandez, \u201cImproving the reliability of SRAM-based PUFs under varying operation conditions and aging degradation\u201d, Microelectronics Reliability, vol. 118, pp. 114049, 2021.<\/b><\/p>\n<\/li>\n P. Saraza-Canflanca, J. Martin-Martinez, R. Castro-Lopez, E. Roca, R. Rodriguez, F. V. Fernandez, M. Nafria, \u201cStatistical Characterization of Time-Dependent Variability Defects Using the Maximum Current Fluctuation\u201d, IEEE Transactions on Electron Devices, doi: 10.1109\/TED.2021.3086448. (2021) in press <\/b><\/p>\n<\/li>\n A. Crespo-Yepes, R. Ramos, E. Barajas, X. Aragones, D. Mateo, J. Martin-Martinez, R. Rodriguez and M. Nafria, \u201cModeling of the degradation of CMOS inverters under pulsed stress conditions from \u2018on-the-fly\u2019 measurements\u201c, Solid-State Electronics, Vol. 184, 108094 (2021) <\/b><\/p>\n<\/li>\n A. Ruiz, C. Couso, N. Seoane, M. Porti, A.J. Garc\u00eda-Loureiro, M. Nafria, \u201cMethodology for the simulation of the variability of MOSFETs with polycrystalline high-k dielectrics using CAFM input data\u201d, IEEE Access, accepted for publication<\/b><\/p>\n<\/li>\n E. Salvador, M.B. Gonzalez, F. Campabadal, J. Martin-Martinez, R. Rodriguez, E. Miranda, \u201cSPICE Modeling of Cycle-to-Cycle Variability in RRAM Devices\u201d, Solid State Electronics, Vol. 185<\/a>, 108040 (2021).<\/b><\/p>\n<\/li>\n G. Pedreira, J. Martin-Martinez, P. Saraza-Canflanca, R. Castro-Lopez, R. Rodriguez, E. Roca, F. V. Fernandez, M. Nafria, \u201cUnified RTN and BTI statistical compact modeling from a defect-centric perspective\u201d, Solid-State Electronics, Vol. 185, 108112 (2021) <\/b><\/p>\n<\/li>\n J. Diaz-Fortuny, P. Saraza-Canflanca, R. Rodriguez, J. Martin-Martinez, R. Castro-Lopez, E. Roca, F. V. Fernandez and M, Nafria, \u201cStatistical threshold voltage shifts caused by BTI and HCI at nominal and accelerated conditions\u201d, Solid State Electronics, Vol. 185<\/a>, 108037, (2021). <\/b><\/p>\n<\/li>\n A. Ruiz, S. Claramunt, A. Crespo-Yepes, M. Porti, M. Nafria, H. Xu, C. Liu, Q. Wu, “Exploiting the KPFM capabilities to analyze at the nanoscale the impact of electrical stresses on OTFTs properties”, Solid-State Electronics, Volume 186, 2021, 108061. https:\/\/doi.org\/10.1016\/j.sse.2021.108061<\/a> <\/b><\/p>\n<\/li>\n V. Ntinas et al., “Power-Efficient Noise-Induced Reduction of ReRAM Cell\u2019s Temporal Variability Effects,” in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 68, no. 4, pp. 1378-1382, April 2021, doi: 10.1109\/TCSII.2020.3026950.<\/b><\/p>\n<\/li>\n V. Ntinas, A. Rubio and G. C. Sirakoulis, “Probabilistic Resistive Switching Device Modeling Based on Markov Jump Processes,” in IEEE Access, vol. 9, pp. 983-988, 2021, doi: 10.1109\/ACCESS.2020.3042012.<\/b><\/p>\n<\/li>\n<\/p>\n
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